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4.4.21. AArch32 Address registers

Table 4.141 shows the address translation register and operations. See the ARM® Architecture Reference Manual ARMv8, for ARMv8-A architecture profile for more information.

Table 4.141. Address translation operations
NameCRnOp1CRmOp2ResetWidthDescription
PARc70c40

UNK

32-bit

Physical Address Register

- c7-64-bit

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