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4.3.28. Virtualization Processor ID Register

The VPIDR_EL2 characteristics are:

Purpose

Holds the value of the Virtualization Processor ID. This is the value returned by Non-secure EL1 reads of MIDR. See Table 4.13.

Usage constraints

This register is accessible as follows:

EL0

EL1

(NS)

EL1

(S)

EL2

EL3

(SCR.NS = 1)

EL3

(SCR.NS = 0)

---RWRW-
Configurations

VPIDR_EL2 is architecturally mapped to AArch32 register VPIDR. See Virtualization Processor ID Register.

Attributes

VPIDR_EL2 is a 32-bit register.

VPIDR_EL2 resets to the value of MIDR_EL1.

Figure 4.26 shows the VPIDR_EL2 bit assignments.

Figure 4.26. VPIDR_EL2 bit assignments

Figure 4.26. VPIDR_EL2 bit assignments

Table 4.63 shows the VPIDR_EL2 bit assignments.

Table 4.63. VPIDR_EL2 bit assignments
BitsNameFunction
[31:0]VPIDR

MIDR value returned by Non-secure PL1 reads of the MIDR. The MIDR description defines the subdivision of this value. See Table 4.13.


To access the VPIDR_EL2:

MRS <Xt>, VPIDR_EL2 ; Read VPIDR_EL2 into Xt
MSR VPIDR_EL2, <Xt> ; Write Xt to VPIDR_EL2

Register access is encoded as follows:

Table 4.64. VPIDR_EL2 access encoding
op0op1CRnCRmop2
1110000000000000

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