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4.2.11. AArch64 thread registers

Table 4.10 shows the thread registers in AArch64 state. See the ARM® Architecture Reference Manual ARMv8, for ARMv8-A architecture profile for more information about these operations.

Table 4.10. AArch64 miscellaneous system control operations
NameTypeResetWidthDescription
TPIDR_EL0RWUNK64

Thread Pointer/ID Register, EL0

TPIDR_EL1RWUNK64

Thread Pointer/ID Register, EL1

TPIDRRO_EL0RW UNK64

Thread Pointer/ID Register, Read-Only, EL0

TPIDR_EL2RWUNK64

Thread Pointer/ID Register, EL2

TPIDR_EL3RWUNK64

Thread Pointer/ID Register, EL3


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