The TRCSTALLCTLR characteristics are:
Enables the ETM trace unit to stall the Cortex-A53 processor if the ETM trace unit FIFO overflows.
- Usage constraints
You must always program this register as part of trace unit initialization.
Accepts writes only when the trace unit is disabled.
Available in all configurations.
See the register summary in Table 13.3.
Figure 13.10 shows the TRCSTALLCTLR bit assignments.
Table 13.11 shows the TRCSTALLCTLR bit assignments.
Instruction stall bit. Controls if the trace unit can stall the processor when the instruction trace buffer space is less than LEVEL:
Threshold level field. The field can
support 4 monotonic levels from
The TRCSTALLCTLR can be accessed through the internal memory-mapped
interface and the external debug interface, offset