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4.5.65. Normal Memory Remap Register

The NMRR characteristics are:

Purpose

Provides additional mapping controls for memory regions that are mapped as Normal memory by their entry in the PRRR.

Usage constraints

This register is accessible as follows:

EL0

(NS)

EL0

(S)

EL1

(NS)

EL1

(S)

EL2

EL3

(SCR.NS = 1)

EL3

(SCR.NS = 0)

--RWRWRWRWRW

The register is:

  • Used in conjunction with the PRRR.

  • Not accessible when using the Long-descriptor translation table format.

Configurations

There are separate Secure and Non-secure copies of this register.

The Non-secure NMRR is architecturally mapped to the AArch64 MAIR_EL1[63:32] register when TTBCR.EAE==0.

The Secure NMRR is mapped to the AArch64 MAIR_EL3[63:32] register when TTBCR.EAE==0.

NMRR has write access to the Secure copy of the register disabled when the CP15SDISABLE signal is asserted HIGH.

NMRR has write access to the Secure copy of the register disabled when the CP15SDISABLE signal is asserted HIGH.

Attributes

NMRR is a 32-bit register when TTBCR.EAE is 0.

Figure 4.135 shows the NMRR bit assignments.

Figure 4.135. NMRR bit assignments

Figure 4.135. NMRR bit assignments

Table 4.244 shows the NMRR bit assignments.

Table 4.244. NMRR bit assignments
BitsNameDescription
[2n+17:2n+16][a]ORn

Outer Cacheable property mapping for memory attributes n, if the region is mapped as Normal memory by the PRRR.TRn entry. n is the value of the TEX[0], C and B bits, see Table 4.239. The possible values of this field are:

0b00

Region is Non-cacheable.

0b01

Region is Write-Back, Write-Allocate.

0b10

Region is Write-Through, no Write-Allocate.

0b11

Region is Write-Back, no Write-Allocate.

[2n+1:2n][a]IRn

Inner Cacheable property mapping for memory attributes n, if the region is mapped as Normal Memory by the PRRR.TRn entry. n is the value of the TEX[0], C and B bits, see Table 4.239. The possible values of this field are the same as those given for the ORn field.

[a] Where n is 0-7.


To access the NMRR:

MRC p15, 0, <Rt>, c10, c2, 1    ; Read NMRR into Rt
MCR p15, 0, <Rt>, c10, c2, 1    ; Write Rt to NMRR
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