The FAR_EL3 characteristics are:
Holds the faulting Virtual Address for all synchronous instruction or data aborts, or exceptions from a misaligned PC, taken to EL3.
- Usage constraints
This register is accessible as follows:
(SCR.NS = 1)
(SCR.NS = 0)
- - - - RW RW
There is no additional configuration data for FAR_EL3.
FAR_EL3 is a 64-bit register.
Figure 4.61 shows the FAR_EL3 bit assignments.
Table 4.107 shows the FAR_EL3 bit assignments.
The faulting Virtual Address for all synchronous instruction or data aborts, or an exception from a misaligned PC, taken in EL3.
If a memory fault that sets the FAR is generated from one of the data cache instructions, this field holds the address specified in the register argument of the instruction.
To access the FAR_EL3:
MRS <Xt>, FAR_EL3 ; Read EL3 Fault Address Register MSR FAR_EL3, <Xt> ; Write EL3 Fault Address Register