This section gives an overview of debug and describes the debug components. The processor forms one component of a debug system.
The following methods of debugging an ARM processor based SoC exist:
- Conventional JTAG debug (‘external’ debug)
This is invasive debug with the core halted using:
Breakpoints and watchpoints to halt the core on specific activity.
A debug connection to examine and modify registers and memory, and provide single-step execution.
- Conventional monitor debug (‘self-hosted’ debug)
This is invasive debug with the core running using a debug monitor that resides in memory.
Figure 11.1 shows a typical external debug system.
This typical system has several parts: