You copied the Doc URL to your clipboard.

Integration Instruction ATB Data Register

The TRCITIDATAR characteristics are:

Purpose

Sets the state of the ATDATAMn output pins shown in Table 13.53.

Usage constraints
  • Available when bit[0] of TRCITCTRL is set to 1.

  • The value of the register sets the signals on the output pins when the register is written.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 13.3.

Figure 13.52 shows the TRCITIDATAR bit assignments.

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


Table 13.53 shows the TRCITIDATAR bit assignments.

Table 13.53. TRCITIDATAR bit assignments
Bits Name Function
[31:5] -

Reserved, res0

[4] ATDATAM[31]

Drives the ATDATAM[31] output[a]

[3] ATDATAM[23]

Drives the ATDATAM[23] output[a]

[2] ATDATAM[15]

Drives the ATDATAM[15] output[a]

[1] ATDATAM[7]

Drives the ATDATAM[7] output[a]

[0] ATDATAM[0]

Drives the ATDATAM[0] output[a]

[a] When a bit is set to 0, the corresponding output pin is LOW.

When a bit is set to 1, the corresponding output pin is HIGH.

The TRCITDDATAR bit values correspond to the physical state of the output pins.


The TRCITIDATAR can be accessed through the internal memory-mapped interface and the external debug interface, offset 0xEEC.

Was this page helpful? Yes No