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Sequencer Reset Control Register

The TRCSEQRSTEVR characteristics are:


Resets the sequencer to state 0.

Usage constraints
  • Accepts writes only when the trace unit is disabled.

  • If the sequencer is used, you must program all sequencer state transitions with a valid event.


Available in all configurations.


See the register summary in Table 13.3.

Figure 13.19 shows the TRCSEQRSTEVR bit assignments.

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Table 13.20 shows the TRCSEQRSTEVR bit assignments.

Table 13.20. TRCSEQRSTEVR bit assignments
Bits Name Function
[31:8] - Reserved, res0.

Selects the resource type to move back to state 0:


Single selected resource.


Boolean combined resource pair.

[6:4] - Reserved, res0.

Selects the resource number, based on the value of RESETTYPE:

When RESETTYPE is 0, selects a single selected resource from 0-15 defined by bits[3:0].

When RESETTYPE is 1, selects a Boolean combined resource pair from 0-7 defined by bits[2:0].

The TRCSEQRSTEVR can be accessed through the internal memory-mapped interface and the external debug interface, offset 0x118.