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Sequencer State Register

The TRCSEQSTR characteristics are:


Holds the value of the current state of the sequencer.

Usage constraints
  • Accepts writes only when the trace unit is disabled.

  • Returns stable data only when TRCSTATR.PMSTABLE==1.

  • Software must use this register to set the initial state of the sequencer before the sequencer is used.


Available in all configurations.


See the register summary in Table 13.3.

Figure 13.20 shows the TRCSEQSTR bit assignments.

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Table 13.21 shows the TRCSEQSTR bit assignments.

Table 13.21. TRCSEQSTR bit assignments
Bits Name Function
[31:2] - Reserved, res0.
[1:0] STATE

Current sequencer state:


State 0.


State 1.


State 2.


State 3.

The TRCSEQSTR can be accessed through the internal memory-mapped interface and the external debug interface, offset 0x11c.

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