The TRCSSCCR0 characteristics are:
Controls the single-shot comparator.
- Usage constraints
Accepts writes only when the trace unit is disabled.
Available in all configurations.
See the register summary in Table 13.3.
Figure 13.40 shows the TRCSSCCR0 bit assignments.
Table 13.41 shows the TRCSSCCR0 bit assignments.
Enables the single-shot comparator resource to be reset when it occurs, to enable another comparator match to be detected:
Selects one or more address range comparators for single-shot control.
One bit is provided for each implemented address range comparator.
Selects one or more single address comparators for single-shot control.
One bit is provided for each implemented single address comparator.
The TRCSSCCR0 can be accessed through the internal memory-mapped
interface and the external debug interface, offset