You copied the Doc URL to your clipboard.

ViewInst Include-Exclude Control Register

The TRCVIIECTLR characteristics are:

Purpose

Defines the address range comparators that control the ViewInst Include/Exclude control.

Usage constraints
  • You must always program this register as part of trace unit initialization.

  • Accepts writes only when the trace unit is disabled.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 13.3.

Figure 13.16 shows the TRCVIIECTLR bit assignments.

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


Table 13.17 shows the TRCVIIECTLR bit assignments.

Table 13.17. TRCVIIECTLR bit assignments
Bits Name Function
[31:20] - Reserved, res0.
[19:16] EXCLUDE Defines the address range comparators for ViewInst exclude control. One bit is provided for each implemented Address Range Comparator.
[15:4] - Reserved, res0.
[3:0] INCLUDE

Defines the address range comparators for ViewInst include control.

Selecting no include comparators indicates that all instructions must be included. The exclude control indicates which ranges must be excluded.

One bit is provided for each implemented Address Range Comparator.


The TRCVIIECTLR can be accessed through the internal memory-mapped interface and the external debug interface, offset 0x084.

Was this page helpful? Yes No