The TRCVIIECTLR characteristics are:
Defines the address range comparators that control the ViewInst Include/Exclude control.
- Usage constraints
You must always program this register as part of trace unit initialization.
Accepts writes only when the trace unit is disabled.
Available in all configurations.
See the register summary in Table 13.3.
Figure 13.16 shows the TRCVIIECTLR bit assignments.
Table 13.17 shows the TRCVIIECTLR bit assignments.
|[19:16]||EXCLUDE||Defines the address range comparators for ViewInst exclude control. One bit is provided for each implemented Address Range Comparator.|
Defines the address range comparators for ViewInst include control.
Selecting no include comparators indicates that all instructions must be included. The exclude control indicates which ranges must be excluded.
One bit is provided for each implemented Address Range Comparator.
The TRCVIIECTLR can be accessed through the internal memory-mapped
interface and the external debug interface, offset