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ViewInst Start-Stop Control Register

The TRCVISSCTLR characteristics are:

Purpose

Defines the single address comparators that control the ViewInst Start/Stop logic.

Usage constraints
  • You must always program this register as part of trace unit initialization.

  • Accepts writes only when the trace unit is disabled.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 13.3.

Figure 13.17 shows the TRCVISSCTLR bit assignments.

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Table 13.18 shows the TRCVISSCTLR bit assignments.

Table 13.18. TRCVISSCTLR bit assignments
Bits Name Function
[31:24] - Reserved, res0.
[23:16] STOP

Defines the single address comparators to stop trace with the ViewInst Start/Stop control.

One bit is provided for each implemented single address comparator.

[15:8] - Reserved, res0.
[7:0] START

Defines the single address comparators to start trace with the ViewInst Start/Stop control.

One bit is provided for each implemented single address comparator.


The TRCVISSCTLR can be accessed through the internal memory-mapped interface and the external debug interface, offset 0x088.

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