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Debug and trace

The Cortex-A53 processor supports a range of debug and trace features including:

  • ARM v8 debug features in each core.

  • ETMv4 instruction trace unit for each core.

  • CoreSight Cross Trigger Interface (CTI).

  • CoreSight Cross Trigger Matrix (CTM).

  • Debug ROM.

The Cortex-A53 processor has an Advanced Peripheral Bus version 3 (APBv3) debug interface that is CoreSight compliant. This permits system access to debug resources, for example, the setting of watchpoints and breakpoints.

The Cortex-A53 processor provides performance monitors that can be configured to gather statistics on the operation of each core and the memory system. The performance monitors implement the ARM PMUv3 architecture.

See Debug, Performance Monitor Unit, and Embedded Trace Macrocell for more information.

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