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ARM architecture

The Cortex-A53 processor implements the ARMv8-A architecture. This includes:

  • Support for both AArch32 and AArch64 Execution states.

  • Support for all exception levels, EL0, EL1, EL2, and EL3, in each execution state.

  • The A32 instruction set, previously called the ARM instruction set.

  • The T32 instruction set, previously called the Thumb instruction set.

  • The A64 instruction set.

The Cortex-A53 processor supports the following architecture extensions:

  • Optional Advanced SIMD and Floating-point Extension for integer and floating-point vector operations.

    Note

    • The Advanced SIMD architecture, its associated implementations, and supporting software, are commonly referred to as NEON technology.

    • To perform floating-point operations, you must implement the Advanced SIMD and Floating-point Extension. There is no software API library for floating-point in the ARMv8-A architecture.

    • You cannot implement floating-point without Advanced SIMD.

  • Optional ARMv8 Cryptography Extensions.

    Note

    You cannot implement the Cryptography Extensions without Advanced SIMD and Floating-point.

See the ARM® Architecture Reference Manual ARMv8, for ARMv8-A architecture profile for more information.

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