The REVIDR characteristics are:
Provides implementation-specific minor revision information that can be interpreted only in conjunction with the Main ID Register.
- Usage constraints
This register is accessible as follows:
(SCR.NS = 1)
(SCR.NS = 0)
- - RO RO RO RO RO
REVIDR is architecturally mapped to AArch64 register REVIDR_EL1. See Revision ID Register.
There is one copy of this register that is used in both Secure and Non-secure states.
REVIDR is a 32-bit register.
Figure 4.78 shows the REVIDR bit assignments.
Table 4.162 shows the REVIDR bit assignments.
Implementation-specific revision information. The reset value is determined by the specific Cortex-A53 MPCore implementation.
To access the REVIDR:
MRC p15, 0, <Rt>, c0, c0, 6; Read REVIDR into Rt
Register access is encoded as follows: