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c2 registers

Table 4.132 shows the 32-bit wide system registers you can access when the processor is in AArch32 state and the value of CRn is c2.

Table 4.132. c2 register summary
CRn Op1 CRm Op2 Name Reset Description
c2 0 c0 0 TTBR0 UNK Translation Table Base Register 0
1 TTBR1 UNK Translation Table Base Register 1
2 TTBCR

0x00000000[a]

Translation Table Base Control Register
4 c0 2 HTCR UNK

Hyp Translation Control Register

c1 2 VTCR UNK Virtualization Translation Control Register

[a] The reset value is 0x00000000 for the Secure copy of the register. The reset value for the EAE bit of the Non-secure copy of the register is 0x0. You must program the Non-secure copy of the register with the required initial value, as part of the processor boot sequence.


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