The CBAR_EL1 characteristics are:
Holds the physical base address of the memory-mapped GIC CPU interface registers.
- Usage constraints
This register is accessible as follows:
(SCR.NS = 1)
(SCR.NS = 0)
- RO RO RO RO RO
There is one copy of this register that is used in both Secure and Non-secure states.
CBAR_EL1 is a 64-bit register.
Figure 4.75 shows the CBAR_EL1 bit assignments.
Table 4.128 shows the CBAR_EL1 bit assignments.
The input PERIPHBASE[39:18] determines the reset value.
To access the CBAR_EL1:
MRS <Xt>, S3_1_C15_C3_0 ; Read CBAR_EL1 into Xt