The HPFAR_EL2 characteristics are:
Holds the faulting IPA for some aborts on a stage 2 translation taken to EL2.
- Usage constraints
This register is accessible as follows:
(SCR.NS = 1)
(SCR.NS = 0)
- - - RW RW RW
HPFAR_EL2[31:0] is mapped to AArch32 register HPFAR. See Hyp IPA Fault Address Register.
HPFAR_EL2 is a 64-bit register.
Figure 4.57 shows the HPFAR_EL2 bit assignments.
Bits [47:12] of the faulting intermediate physical address. The equivalent upper bits in this field are res0.
To access the HPFAR_EL:
MRS <Xt>, HPFAR_EL2 ; Read EL2 Fault Address Register MSR HPFAR_EL2, <Xt> ; Write EL2 Fault Address Register