The VBAR_EL3 characteristics are:
Holds the exception base address for any exception that is taken to EL3.
- Usage constraints
This register is accessible as follows:
(SCR.NS = 1)
(SCR.NS = 0)
- - - - RW RW
The VBAR_EL3[31:0] is mapped to the Secure AArch32 VBAR register. See Vector Base Address Register.
VBAR_EL3 is a 64-bit register.
Figure 4.67 shows the VBAR_EL3 bit assignments.
Table 4.119 shows the VBAR_EL3 bit assignments.
|[63:11]||Vector base address||
Base address of the exception vectors for exceptions taken in this exception level.
To access the VBAR_EL3:
MRS <Xt>, VBAR_EL3 ; Read EL3 Vector Base Address Register MSR VBAR_EL3, <Xt> ; Write EL3 Vector Base Address Register