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13.8.50. Integration Instruction ATB Data Register

The TRCITIDATAR characteristics are:


Sets the state of the ATDATAMn output pins shown in Table 13.53.

Usage constraints
  • Available when bit[0] of TRCITCTRL is set to 1.

  • The value of the register sets the signals on the output pins when the register is written.


Available in all configurations.


See the register summary in Table 13.3.

Figure 13.52 shows the TRCITIDATAR bit assignments.

Figure 13.52. TRCITIDATAR bit assignments

Figure 13.52. TRCITIDATAR bit assignments

Table 13.53 shows the TRCITIDATAR bit assignments.

Table 13.53. TRCITIDATAR bit assignments

Reserved, res0


Drives the ATDATAM[31] output[a]


Drives the ATDATAM[23] output[a]


Drives the ATDATAM[15] output[a]


Drives the ATDATAM[7] output[a]


Drives the ATDATAM[0] output[a]

[a] When a bit is set to 0, the corresponding output pin is LOW.

When a bit is set to 1, the corresponding output pin is HIGH.

The TRCITDDATAR bit values correspond to the physical state of the output pins.

The TRCITIDATAR can be accessed through the internal memory-mapped interface and the external debug interface, offset 0xEEC.