The PMU counters and their associated control registers are
accessible in the AArch64 Execution state with MRS
and MSR
instructions.
Table 12.3 gives a summary of the Cortex-A53 PMU registers in the AArch64 Execution state. For those registers not described in this chapter, see the ARM® Architecture Reference Manual ARMv8, for ARMv8-A architecture profile.
Name | Type | Width | Description |
---|---|---|---|
PMCR_EL0 | RW | 32 | Performance Monitors Control Register |
PMCNTENSET_EL0 | RW | 32 | Performance Monitors Count Enable Set Register |
PMCNTENCLR_EL0 | RW | 32 | Performance Monitors Count Enable Clear Register |
PMOVSCLR_EL0 | RW | 32 | Performance Monitors Overflow Flag Status Register |
PMSWINC_EL0 | WO | 32 | Performance Monitors Software Increment Register |
PMSELR_EL0 | RW | 32 | Performance Monitors Event Counter Selection Register |
PMCEID0_EL0 | RO | 32 | Performance Monitors Common Event Identification Register 0 |
PMCEID1_EL0 | RO | 32 | Performance Monitors Common Event Identification Register 1 |
PMCCNTR_EL0 | RW | 64 | Performance Monitors Cycle Count Register |
PMXEVTYPER_EL0 | RW | 32 | Performance Monitors Selected Event Type and Filter Register |
PMCCFILTR_EL0 | RW | 32 | Performance Monitors Cycle Count Filter Register |
PMXEVCNTR0_EL0 | RW | 32 | Performance Monitors Selected Event Count Register |
PMUSERENR_EL0 | RW | 32 | Performance Monitors User Enable Register |
PMINTENSET_EL1 | RW | 32 | Performance Monitors Interrupt Enable Set Register |
PMINTENCLR_EL1 | RW | 32 | Performance Monitors Interrupt Enable Clear Register |
PMOVSSET_EL0 | RW | 32 | Performance Monitors Overflow Flag Status Set Register |
PMEVCNTR0_EL0 | RW | 32 | Performance Monitors Event Count Registers |
PMEVCNTR1_EL0 | RW | 32 | |
PMEVCNTR2_EL0 | RW | 32 | |
PMEVCNTR3_EL0 | RW | 32 | |
PMEVCNTR4_EL0 | RW | 32 | |
PMEVCNTR5_EL0 | RW | 32 | |
PMEVTYPER0_EL0 | RW | 32 | Performance Monitors Event Type Registers |
PMEVTYPER1_EL0 | RW | 32 | |
PMXVTYPER2_EL0 | RW | 32 | |
PMEVTYPER3_EL0 | RW | 32 | |
PMEVTYPER4_EL0 | RW | 32 | |
PMEVTYPER5_EL0 | RW | 32 | |
PMCCFILTR_EL0 | RW | 32 | Performance Monitors Cycle Count Filter Register |