The Cortex-A53 processor implements the ARMv8-A architecture. This includes:
Support for all the Exception levels, EL0-EL3.
Support for both Execution states, AArch64 and AArch32, at each Exception level.
The following instruction sets:
- AArch64 Execution state
The A64 instruction set.
- AArch32 Execution state
The T32 and A32 instruction sets.
Optionally, an implementation can include one or more of:
The Advanced SIMD and floating-point instructions, in all instruction sets.
The Cryptography Extension, that provides additional instructions in all instruction sets.
See the ARM® Architecture Reference Manual ARMv8, for ARMv8-A architecture profile for more information.
This section describes: