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4.4.24. AArch32 Thread registers

Table 4.152 shows the miscellaneous operations. See the ARM® Architecture Reference Manual ARMv8, for ARMv8-A architecture profile for more information.

Table 4.152. Miscellaneous System instructions
NameCRnOp1CRmOp2ResetDescription
TPIDRURWc130c02UNK

User Read/Write Thread ID Register

TPIDRURO   3UNK

User Read-Only Thread ID Register

TPIDRPRW   4UNK

EL1 only Thread ID Register

HTPIDR 4c02UNK

Hyp Software Thread ID Register


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