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4.4.3. c2 registers

Table 4.132 shows the 32-bit wide system registers you can access when the processor is in AArch32 state and the value of CRn is c2.

Table 4.132. c2 register summary
CRnOp1CRmOp2NameResetDescription
c20c00TTBR0UNKTranslation Table Base Register 0
1TTBR1UNKTranslation Table Base Register 1
2TTBCR

0x00000000[a]

Translation Table Base Control Register
4c02HTCRUNK

Hyp Translation Control Register

c12VTCRUNK Virtualization Translation Control Register

[a] The reset value is 0x00000000 for the Secure copy of the register. The reset value for the EAE bit of the Non-secure copy of the register is 0x0. You must program the Non-secure copy of the register with the required initial value, as part of the processor boot sequence.


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