Table 4.139 shows the System operations when CRn is c8 and the processor is in AArch32 state. See the ARM® Architecture Reference Manual ARMv8 for more information about these operations.
| op1 | CRm | op2 | Name | Description |
|---|---|---|---|---|
| 0 | c3 | 0 | TLBIALLIS | Invalidate entire TLB Inner Shareable |
| 1 | TLBIMVAIS | Invalidate unified TLB entry by VA and ASID Inner Shareable | ||
| 2 | TLBIASIDIS | Invalidate unified TLB by ASID match Inner Shareable | ||
| 3 | TLBIMVAAIS | Invalidate unified TLB entry by VA all ASID Inner Shareable | ||
| 5 | TLBIMVALIS | Invalidate unified TLB entry by VA Inner Shareable, Last level | ||
| 7 | TLBIMVAALIS | Invalidate unified TLB by VA all ASID Inner Shareable, Last level | ||
| c5 | 0 | ITLBIALL | Invalidate instruction TLB | |
| 1 | ITLBIMVA | Invalidate instruction TLB entry by VA and ASID | ||
| 2 | ITLBIASID | Invalidate instruction TLB by ASID match | ||
| c6 | 0 | DTLBIALL | Invalidate data TLB | |
| 1 | DTLBIMVA | Invalidate data TLB entry by VA and ASID | ||
| 2 | DTLBIASID | Invalidate data TLB by ASID match | ||
| c7 | 0 | TLBIALL | Invalidate unified TLB | |
| 1 | TLBIMVA | Invalidate unified TLB by VA and ASID | ||
| 2 | TLBIASID | Invalidate unified TLB by ASID match | ||
| 3 | TLBIMVAA | Invalidate unified TLB entries by VA all ASID | ||
| 5 | TLBIMVAL | Invalidate last level of stage 1 TLB entry by VA | ||
| 7 | TLBIMVAAL | Invalidate last level of stage 1 TLB entry by VA all ASID | ||
| 4 | c0 | 1 | TLBIIPAS2IS | TLB Invalidate entry by Intermediate Physical Address, Stage 2, Inner Shareable |
| 5 | TLBIIPAS2LIS | TLB Invalidate entry by Intermediate Physical Address, Stage 2, Last level, Inner Shareable | ||
| c3 | 0 | TLBIALLHIS | Invalidate entire Hyp unified TLB Inner Shareable | |
| 1 | TLBIMVAHIS | Invalidate Hyp unified TLB entry by VA Inner Shareable | ||
| 4 | TLBIALLNSNHIS | Invalidate entire Non-secure non-Hyp unified TLB Inner Shareable | ||
| 5 | TLBIMVALHIS | Invalidate Unified Hyp TLB entry by VA Inner Shareable, Last level | ||
| c4 | 1 | TLBIIPAS2 | TLB Invalidate entry by Intermediate Physical Address, Stage 2 | |
| 5 | TLBIIPAS2L | TLB Invalidate entry by Intermediate Physical Address, Stage 2, Last level | ||
| c7 | 0 | TLBIALLH | Invalidate entire Hyp unified TLB | |
| 1 | TLBIMVAH | Invalidate Hyp unified TLB entry by VA | ||
| 4 | TLBIALLNSNH | Invalidate entire Non-secure non-Hyp unified TLB | ||
| 5 | TLBIMVALH | Invalidate Unified Hyp TLB entry by VA, Last level |