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4.4.23. AArch32 Address registers

Table 4.151 shows the address translation register and operations. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile for more information.

Table 4.151. Address translation operations
NameCRnOp1CRmOp2ResetWidthDescription
PARc70c40

UNK

32-bit

Physical Address Register

- c7-64-bit