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4.3.68. Physical Address Register, EL1

The PAR_EL1 characteristics are:

Purpose

The Physical Address returned from an address translation.

Usage constraints

This register is accessible as follows:

EL0

EL1

(NS)

EL1

(S)

EL2

EL3

(SCR.NS = 1)

EL3

(SCR.NS = 0)

-RWRWRWRWRW
Configurations

PAR_EL1 is architecturally mapped to AArch32 register PAR(NS). See Physical Address Register.

Attributes

PAR_EL1 is a 64-bit register.

Figure 4.62 shows the PAR_EL1 bit assignments when the Virtual Address to Physical Address conversion completes successfully.

Figure 4.62. PAR_EL1 pass bit assignments

Figure 4.62. PAR_EL1 pass bit assignments

Table 4.111 shows the PAR_EL1 bit assignments when the Virtual Address to Physical Address conversion completes successfully.

Table 4.111.  PAR_EL1 pass bit assignments
BitsNameFunction
[63:56]Attr

Memory attributes for the returned output address. This field uses the same encoding as the Attr<n>fields in MAIR_EL1, MAIR_EL2, and MAIR_EL3.

[55:48]-Reserved, res0.
[47:12]PAPhysical address. The Physical Address corresponding to the supplied Virtual Address. Returns address bits[47:12].
[11]-Reserved, res1.
[10]-Reserved, res0.
[9]NS

Non-secure. The NS attribute for a translation table entry read from Secure state.

This bit is unknown for a translation table entry from Non-secure state.

[8:7]SHA

Shareability attribute for the Physical Address returned from a translation table entry. The possible values are:

0b00

Non-shareable.

0b01

Reserved.

0b10

Outer Shareable

0b11

Inner Shareable.

Note

Takes the value of 0b10 for:

  • Any type of device memory.

  • Normal memory with both Inner Non-cacheable and Outer-cacheable attributes.

[6:1]-Reserved, res0.
[0]F

Pass/Fail bit. Indicates whether the conversion completed successfully. This value is:

0

Virtual Address to Physical Address conversion completed successfully.


Figure 4.63 shows the PAR_EL1 bit assignments when the Virtual Address to Physical Address conversion is aborted.

Figure 4.63. PAR_El1 fail bit assignments

Figure 4.63. PAR_El1 fail bit assignments

Table 4.112 shows the PAR_EL1 bit assignments when the Virtual Address to Physical Address conversion is aborted.

Table 4.112.  PAR_EL1 fail bit assignments
BitsNameFunction
[63:12]-

Reserved, res0.

[11]-Reserved, res1.
[10]-Reserved, res0.
[9]S

Stage of fault. Indicates the state where the translation aborted. The possible values are:

0

Translation aborted because of a fault in stage 1 translation.

1

Translation aborted because of a fault in stage 2 translation.

[8]PTW

Indicates a stage 2 fault during a stage 1 table walk. The possible values are:

0

No stage 2 fault during a stage 1 table walk.

1

Translation aborted because of a stage 2 fault during a stage 1 table walk.

[7]-Reserved, res0.
[6:1]FST

Fault status code, as shown in the Data Abort ESR encoding. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile for more information.

[0]F

Pass/Fail bit. Indicates whether the conversion completed successfully. This value is:

1

Virtual Address to Physical Address conversion aborted.


To access the PAR_EL1:

MRS <Xt>, PAR_EL1 ; Read EL1 Physical Address Register
MSR PAR_EL1, <Xt> ; Write EL1 Physical Address Register