The VBAR_EL2 characteristics are:
Holds the exception base address for any exception that is taken to EL2.
- Usage constraints
This register is accessible as follows:
(SCR.NS = 1)
(SCR.NS = 0)
- - - RW RW RW
The VBAR_EL2[31:0] is architecturally mapped to the AArch32 HVBAR register. See Hyp Vector Base Address Register.
VBAR_EL2 is a 64-bit register.
Figure 4.66 shows the VBAR_EL2 bit assignments.
Table 4.117 shows the VBAR_EL2 bit assignments.
|[63:11]||Vector base address|
Base address of the exception vectors for exceptions taken in this exception level.
To access the VBAR_EL2:
MRS <Xt>, VBAR_EL2 ; Read VBAR_EL2 into Xt MSR VBAR_EL2, <Xt> ; Write Xt to VBAR_EL2
Register access is encoded as follows: