The system registers control and provide status information for the functions implemented in the processor. The main functions of the system registers are:
Overall system control and configuration.
Memory Management Unit (MMU) configuration and management.
Cache configuration and management.
System performance monitoring.
GIC configuration and management.
The system registers are accessible in the AArch64 and AArch32 Execution states. The execution states are described in the ARMv8-A architecture concepts.
The system registers accessed in the AArch64 Execution state are described in the AArch64 register descriptions.
The system registers accessed in the AArch32 Execution state are described in the AArch32 register descriptions.
Some of the system registers can be accessed through the memory-mapped or external debug interfaces.
Bits in the system registers that are described in the Armv7 architecture are redefined in the Armv8-A architecture:
UNK/SBZP, RAZ/SBZP, and RAZ/WI are redefined as res0.
UNK/SBOP and RAO/SBOP are redefined as res1.
res0 and res1 are described in the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.
For more information on the execution states, see the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.