The Armv8-A architecture introduces several new memory types in place of the Armv7 Device and Strongly-Ordered memory types. These relate to the following attributes:
Gathering. The capability to gather and merge requests together into a single transaction.
Reordering. The capability to reorder transactions.
Early-acknowledge. The capability to accept early acknowledge of transactions from the interconnect.
Table 6.1 describes the Armv8 memory types.
|GRE||Similar to Normal non-cacheable, but does not permit speculative accesses.|
|nGRE||Treated as nGnRE inside the Cortex-A53 processor, but can be reordered by the external interconnect.|
|nGnRE||Corresponds to Device in Armv7.|
|nGnRnE||Corresponds to Strongly Ordered in Armv7. Treated the same as nGnRE inside a Cortex-A53 processor, but reported differently on AxCACHE.|
As defined by the architecture, these bits apply only when the translation table is marked as Armv8 Device memory, they do not apply to Normal memory. If an Armv7 architecture operating system runs on a Cortex-A53 processor, the Device memory type matches the nGnRE encoding and the Strongly-Ordered memory type matches the nGnRnE memory type.