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Appendix B. Revisions

This appendix describes the technical changes between released issues of this book.

Table B.1. Issue A
ChangeLocationAffects
No changes, first release--

Table B.2. Differences between Issue A and Issue B
ChangeLocationAffects
Information added on TBU queue depth support

Chapter 1 Introduction

Chapter 2 Functional Description

r1p0
Information added on 128 contexts support Chapter 1 Introductionr1p0
Information added on support for configuring TCU core to run at half the clock speed compared to TCU external interfaces

Chapter 1 Introduction

Chapter 2 Functional Description

r1p0
Modified page size values for S1 and S2 translationChapter 3 Programmers ModelAll
Information added on Global address space 1 Chapter 3 Programmers ModelAll
Added the dftmcphold signal to Table A.20Appendix A Signal DescriptionsAll
Information added on Peripheral and component identification registers summary. Chapter 3 Programmers ModelAll
Information added on TCU and TBU interfaces

Chapter 1 Introduction

Chapter 2 Functional Description

All
Corrected the clock and power domains in Figure 2.4Chapter 2 Functional DescriptionAll
Information added on TBU barrier supportChapter 2 Functional DescriptionAll
Added SMMU_TBU_PWR_STATUS register to Integration registersChapter 3 Programmers ModelAll

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