The following information applies to the MMU-500 registers:
Registers are implemented according to the ARM® System Memory Management Unit Architecture Specification with the security extensions implemented in the MMU-500 as follows:
Unless otherwise stated in the accompanying text:
Do not modify undefined register bits.
Ignore undefined register bits on reads.
All register values are unknown on reset unless otherwise stated.
The access types of the MMU-500 registers are as follows:
Read-As-One, Should-Be-One-or-Preserved on writes.
Read-As-Zero, Should-Be-Zero-or-Preserved on writes.
Read and write.