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3.8.2. Integration Test Input register

The SMMU_ITIP register characteristics are:


Enables the MMU-500 to read the status of the spniden signal.


Available in all MMU-500 configurations.


Figure 3.8 shows the bit assignments.

Figure 3.8. SMMU_ITIP register bit assignments

Figure 3.8. SMMU_ITIP register bit assignments

Table 3.20 shows the bit assignments.

Table 3.20. SMMU_ITIP register bit assignments
BitsName Reset valueDescription
[0]SPNIDEN-The Secure debug input, that is the value of the spniden signal.