This section describes the differences in functionality between product revisions of the MMU-500:
- r0p0 - r1p0
16-deep TBU queue support.
32-deep write buffer support.
Support for half-clock configuration. The TCU core runs at half the speed of the I/O clock. This enables the synchronous interfaces to run at a higher clock speed. The clock division is handled internally by the TCU.
- r1p0 - r2p0
You can also configure the StreamID width as 15 bits.
- r2p0 - r2p1
Support for normalization.
- r2p1 - r2p2
Change to SMMU_IDR7.MINOR register value.