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3.8.8. TBU Power Status register

The SMMU_TBU_PWR_STATUS register characteristics include:

Purpose

Provides the power status of TBUs.

Configuration

Available in all MMU-500 configurations.

Attributes

Figure 3.16 shows the bit assignments.

Figure 3.17. SMMU_TBU_PWR_STATUS register bit assignments

Figure 3.17. SMMU_TBU_PWR_STATUS register bit assignments

Table 3.28 shows the bit assignments.

Table 3.29. SMMU_TBU_PWR_STATUS register bit assignments
BitsName Reset valueDescription
[31:NUM_TBU]Reserved-Reserved
[NUM_TBU-1:0]State0x0

Indicates the corresponding TBU as follows:

  • Bit n corresponds to TBUn.

Each bit can have one of the following values:

0

The TBU is powered down.

1

The TBU is powered up.