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2.3.3. Hit-Under-Miss

Hit-Under-Miss (HUM) translates a TLB miss transaction and passes the transaction to a downstream slave if the translated TLB miss transaction results in a TLB hit. HUM allows responding to the master if there is a TLB hit for a subsequent transaction while the MMU-500 is performing a translation for a previous transaction that had a TLB miss. HUM characteristics for read and write transactions are as follows:

  • If the transactions are read accesses, HUM is automatically enabled.

  • If the transactions are write operations, HUM is enabled or disabled based on the write buffer depth. You can specify the write buffer depth during configuration.

    • If the depth of the write buffer is zero, HUM is automatically disabled.

    • If the depth of the write buffer is non-zero, a write hit transaction is translated only if the write data from a missed transaction can be accommodated in the write buffer.

  • The number of outstanding missed transactions is determined by the depth of the write buffer. For example, if the depth of the buffer is four, then it can hold two transactions of length two. Each buffer entry holds only one beat of the transaction, even if it is of a narrow width.

Example 2.1 shows a HUM condition.

Consider that the write buffer depth is eight and there are two missed write transactions of lengths four and three. Both missed write transactions are stored in the write buffer during the PTWs for the transactions. If you perform another transaction before the missed write transactions are processed, the new transaction is passed through, if that access results in a TLB hit.


Note

If the write buffer is full with missed write transactions, HUM cannot occur.

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