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1.1.2. Design and verification components

CoreLink SIE-200 System IP for Embedded consists of the following components and models:

AHB5 system components

The AHB5 system components are:

  • AHB5 bus matrix.

  • AHB5 default slave.

  • AHB5 example slave.

  • AHB5 exclusive access monitor.

  • AHB5 GPIO.

  • AHB5 master multiplexer.

  • AHB5 slave multiplexer.

  • AHB5 timeout monitor.

  • AHB5 to external SRAM interface.

  • AHB5 to ROM interface.

  • AHB5 to internal SRAM interface module.

  • Cortex-M3/Cortex-M4 AHB5 adapter.

AHB5 bridge components

The AHB5 bridge components are:

  • AHB5 access control gate.

  • AHB5 downsizer.

  • AHB5 to AHB5 and APB4 asynchronous bridge.

  • AHB5 to AHB5 sync-down bridge.

  • AHB5 to ABH5 low-latency sync-down bridge.

  • AHB5 to AHB5 synchronous bridge.

  • AHB5 to AHB5 sync-up bridge.

  • AHB5 to AHB5 low-latency sync-up bridge.

  • AHB5 to APB4 asynchronous bridge.

  • AHB5 to APB4 sync-down bridge.

  • AHB5 to APB4 low-latency sync-down bridge.

  • AHB5 upsizer.

TrustZone Protection controllers

The TrustZone components are:

  • AHB5 TrustZone master security controller.

  • AHB5 TrustZone memory protection controller.

  • AHB5 TrustZone peripheral protection controller.

  • APB4 TrustZone peripheral protection controller.

Verification components

  • AHB5 FRBM.

  • Behavioral SRAM model with an AHB5 interface.

  • External asynchronous 8-bit SRAM model.

  • External asynchronous 16-bit SRAM model.

  • FPGA SRAM synthesizable model.

  • RAM wrapper model.

  • ROM behavioral model.

  • ROM wrapper model.

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