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ID_AA64ISAR0_EL1, AArch64 Instruction Set Attribute Register 0

The ID_AA64ISAR0_EL1 characteristics are:

Purpose

Provides information about the instructions implemented in AArch64 state.

For general information about the interpretation of the ID registers see 'Principles of the ID scheme for fields in ID registers' in the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile, section D10.4.1.

Configuration

Attributes

ID_AA64ISAR0_EL1 is a 64-bit register.

Field descriptions

The ID_AA64ISAR0_EL1 bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
RNDRTLBTSFHMDPSM4SM3SHA3
RDM0000AtomicCRC32SHA2SHA1AES0000
313029282726252423222120191817161514131211109876543210

RNDR, bits [63:60]

From Armv8.5:

Indicates support for Random Number instructions in AArch64 state. Defined values are:

RNDRMeaning
0b0000

No Random Number instructions are implemented.

0b0001

MRS reading the RNDR and RNDRRS registers are implemented.

All other values are reserved.

ARMv8.5-RNG implements the functionality identified by the value 0b0001.

From Armv8.5, the permitted values are 0b0000 and 0b0001.


Otherwise:

Reserved, RES0.

TLB, bits [59:56]

From Armv8.4:

Indicates support for Outer shareable and TLB range maintenance instructions. Defined values are:

TLBMeaning
0b0000

Outer shareable and TLB range maintenance instructions are not implemented.

0b0001

Outer shareable TLB maintenance instructions are implemented.

0b0010

Outer shareable and TLB range maintenance instructions are implemented.

All other values are reserved.

ARMv8.4-TLBI implements the functionality identified by the values 0b0001 and 0b0010.

From Armv8.4, the only permitted value is 0b0010.


Otherwise:

Reserved, RES0.

TS, bits [55:52]

Indicates support for flag manipulation instructions. Defined values are:

TSMeaning
0b0000

No flag manipulation instructions are implemented.

0b0001

CFINV, RMIF, SETF16, and SETF8 instructions are implemented.

0b0010

CFINV, RMIF, SETF16, SETF8, AXFlag, and XAFlag instructions are implemented.

All other values are reserved.

ARMv8.4-CondM implements the functionality identified by the value 0b0001.

ARMv8.5-CondM implements the functionality identified by the value 0b0010.

From Armv8.4, the only permitted value is 0b0001.

From Armv8.5, the only permitted value is 0b0010.

FHM, bits [51:48]

From Armv8.2:

Indicates whether FMLAL and FMLSL instructions are implemented.

FHMMeaning
0b0000

FMLAL and FMLSL instructions are not implemented.

0b0001

FMLAL and FMLSL instructions are implemented.

All other values are reserved.

ARMv8.2-FHM implements the functionality identified by the value 0b0001.

From Armv8.2, the permitted values are 0b0000 and 0b0001.


Otherwise:

Reserved, RES0.

DP, bits [47:44]

From Armv8.2:

Dot Product instructions implemented in AArch64 state. Defined values are:

DPMeaning
0b0000

No Dot Product instructions implemented.

0b0001

UDOT and SDOT instructions implemented.

All other values are reserved.

ARMv8.2-DotProd implements the functionality identified by the value 0b0001.

From Armv8.2, the permitted values are 0b0000 and 0b0001.


Otherwise:

Reserved, RES0.

SM4, bits [43:40]

From Armv8.2:

SM4 instructions implemented in AArch64 state. Defined values are:

SM4Meaning
0b0000

No SM4 instructions implemented.

0b0001

SM4E and SM4EKEY instructions implemented.

All other values are reserved.

If ARMv8.2-SM is not implemented the value 0b0001 is reserved.

From Armv8.2, the permitted values are 0b0000 and 0b0001.

This field must have the same value as ID_AA64ISAR0_EL1.SM3.


Otherwise:

Reserved, RES0.

SM3, bits [39:36]

From Armv8.2:

SM3 instructions implemented in AArch64 state. Defined values are:

SM3Meaning
0b0000

No SM3 instructions implemented.

0b0001

SM3SS1, SM3TT1A, SM3TT1B, SM3TT2A, SM3TT2B, SM3PARTW1, and SM3PARTW2 instructions implemented.

All other values are reserved.

If ARMv8.2-SM is not implemented the value 0b0001 is reserved.

ARMv8.2-SM implements the functionality identified by the value 0b0001.

From Armv8.2, the permitted values are 0b0000 and 0b0001.

This field must have the same value as ID_AA64ISAR0_EL1.SM4.


Otherwise:

Reserved, RES0.

SHA3, bits [35:32]

From Armv8.2:

SHA3 instructions implemented in AArch64 state. Defined values are:

SHA3Meaning
0b0000

No SHA3 instructions implemented.

0b0001

EOR3, RAX1, XAR, and BCAX instructions implemented.

All other values are reserved.

If ARMv8.2-SHA is not implemented the value 0b0001 is reserved.

ARMv8.2-SHA implements the functionality identified by the value 0b0001.

From Armv8.2, the permitted values are 0b0000 and 0b0001.

If the value of ID_AA64ISAR0_EL1.SHA1 is 0b0000, then this field must have the value 0b0000.

If the value of this field is 0b0001, then ID_AA64ISAR0_EL1.SHA2 must have the value 0b0010.


Otherwise:

Reserved, RES0.

RDM, bits [31:28]

From Armv8.1:

SQRDMLAH and SQRDMLSH instructions implemented in AArch64 state. Defined values are:

RDMMeaning
0b0000

No SQRDMLAH and SQRDMLSH instructions implemented.

0b0001

SQRDMLAH and SQRDMLSH instructions implemented.

All other values are reserved.

ARMv8.1-RDMA implements the functionality identified by the value 0b0001.

From Armv8.1, the only permitted value is 0b0001.


Otherwise:

Reserved, RES0.

Bits [27:24]

Reserved, RES0.

Atomic, bits [23:20]

From Armv8.1:

Atomic instructions implemented in AArch64 state. Defined values are:

AtomicMeaning
0b0000

No Atomic instructions implemented.

0b0010

LDADD, LDCLR, LDEOR, LDSET, LDSMAX, LDSMIN, LDUMAX, LDUMIN, CAS, CASP, and SWP instructions implemented.

All other values are reserved.

ARMv8.1-LSE implements the functionality identified by the value 0b0010.

From Armv8.1, the only permitted value is 0b0010.


Otherwise:

Reserved, RES0.

CRC32, bits [19:16]

CRC32 instructions implemented in AArch64 state. Defined values are:

CRC32Meaning
0b0000

No CRC32 instructions implemented.

0b0001

CRC32B, CRC32H, CRC32W, CRC32X, CRC32CB, CRC32CH, CRC32CW, and CRC32CX instructions implemented.

All other values are reserved.

In Armv8.0, the permitted values are 0b0000 and 0b0001.

From Armv8.1, the only permitted value is 0b0001.

SHA2, bits [15:12]

SHA2 instructions implemented in AArch64 state. Defined values are:

SHA2Meaning
0b0000

No SHA2 instructions implemented.

0b0001

SHA256H, SHA256H2, SHA256SU0, and SHA256SU1 instructions implemented.

0b0010

As 0b0001, plus SHA512H, SHA512H2, SHA512SU0, and SHA512SU1 instructions implemented.

All other values are reserved.

If ARMv8.2-SHA is not implemented the value 0b0010 is reserved.

From Armv8.2, the permitted values are 0b0000, 0b0001, and 0b0010.

If the value of ID_AA64ISAR0_EL1.SHA1 is 0b0000, then this field must have the value 0b0000.

If the value of this field is 0b0010, then ID_AA64ISAR0_EL1.SHA3 must have the value 0b0001.

SHA1, bits [11:8]

SHA1 instructions implemented in AArch64 state. Defined values are:

SHA1Meaning
0b0000

No SHA1 instructions implemented.

0b0001

SHA1C, SHA1P, SHA1M, SHA1H, SHA1SU0, and SHA1SU1 instructions implemented.

All other values are reserved.

In Armv8, the permitted values are 0b0000 and 0b0001.

If the value of ID_AA64ISAR0_EL1.SHA2 is 0b0000, then this field must have the value 0b0000.

AES, bits [7:4]

AES instructions implemented in AArch64 state. Defined values are:

AESMeaning
0b0000

No AES instructions implemented.

0b0001

AESE, AESD, AESMC, and AESIMC instructions implemented.

0b0010

As for 0b0001, plus PMULL/PMULL2 instructions operating on 64-bit data quantities.

All other values are reserved.

In Armv8, the permitted values are 0b0000, 0b0001, and 0b0010.

Bits [3:0]

Reserved, RES0.

Accessing the ID_AA64ISAR0_EL1

Accesses to this register use the following encodings:

MRS <Xt>, ID_AA64ISAR0_EL1

op0CRnop1op2CRm
0b110b00000b0000b0000b0110
if PSTATE.EL == EL0 then
    UNDEFINED;
elsif PSTATE.EL == EL1 then
    if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TID3 == '1' then
        AArch64.SystemAccessTrap(EL2, 0x18);
    else
        return ID_AA64ISAR0_EL1;
elsif PSTATE.EL == EL2 then
    return ID_AA64ISAR0_EL1;
elsif PSTATE.EL == EL3 then
    return ID_AA64ISAR0_EL1;
              


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