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GICR_TYPER, Redistributor Type Register

The GICR_TYPER characteristics are:

Purpose

Provides information about the configuration of this Redistributor.

Configuration

A copy of this register is provided for each Redistributor.

Attributes

GICR_TYPER is a 64-bit register.

Field descriptions

The GICR_TYPER bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
Affinity_Value
PPInum0CommonLPIAffProcessor_Number0MPAMDPGSLastDirectLPIDirtyVLPISPLPIS
313029282726252423222120191817161514131211109876543210

Affinity_Value, bits [63:32]

The identity of the PE associated with this Redistributor.

Bits [63:56] provide Aff3, the Affinity level 3 value for the Redistributor.

Bits [55:48] provide Aff2, the Affinity level 2 value for the Redistributor.

Bits [47:40] provide Aff1, the Affinity level 1 value for the Redistributor.

Bits [39:32] provide Aff0, the Affinity level 0 value for the Redistributor.

PPInum, bits [31:27]

When GIC, >=3.1 is implemented:

The value derived from this field specifies the maximum PPI INTID that a GIC implementation might support. An implementation might not implement all PPIs up to this maximum.

PPInumMeaning
0b00000

Maximum PPI INTID is 31.

0b00001

Maximum PPI INTID is 1087.

0b00010

Maximum PPI INTID is 1119.

All other values are reserved.


Otherwise:

Reserved, RES0.

Bit [26]

Reserved, RES0.

CommonLPIAff, bits [25:24]

The affinity level at which Redistributors share a LPI Configuration table.

CommonLPIAffMeaning
0b00

All Redistributors must share an LPI Configuration table.

0b01

All Redistributors with the same Aff3 value must share an LPI Configuration table.

0b10

All Redistributors with the same Aff3.Aff2 value must share an LPI Configuration table.

0b11

All Redistributors with the same Aff3.Aff2.Aff1 value must share an LPI Configuration table.

Processor_Number, bits [23:8]

A unique identifier for the PE. When GITS_TYPER.PTA == 0, an ITS uses this field to identify the interrupt target.

When affinity routing is disabled for a Security state, this field indicates which GICD_ITARGETSR<n> corresponds to this Redistributor.

Bit [7]

Reserved, RES0.

MPAM, bit [6]

When GIC, >=3.1 is implemented:

MPAM

MPAMMeaning
0b0

MPAM not supported.

0b1

MPAM supported.


Otherwise:

Reserved, RES0.

DPGS, bit [5]

Sets support for GICR_CTLR.DPG* bits.

DPGSMeaning
0b0

GICR_CTLR.DPG* bits are not supported.

0b1

GICR_CTLR.DPG* bits are supported.

Last, bit [4]

Indicates whether this Redistributor is the highest-numbered Redistributor in a series of contiguous Redistributor pages.

LastMeaning
0b0

This Redistributor is not the highest-numbered Redistributor in a series of contiguous Redistributor pages.

0b1

This Redistributor is the highest-numbered Redistributor in a series of contiguous Redistributor pages.

DirectLPI, bit [3]

Indicates whether this Redistributor supports direct injection of LPIs.

DirectLPIMeaning
0b0

This Redistributor does not support direct injection of LPIs. The GICR_SETLPIR, GICR_CLRLPIR, GICR_INVLPIR, GICR_INVALLR, and GICR_SYNCR registers are either not implemented, or have an IMPLEMENTATION DEFINED purpose.

0b1

This Redistributor supports direct injection of LPIs. The GICR_SETLPIR, GICR_CLRLPIR, GICR_INVLPIR, GICR_INVALLR, and GICR_SYNCR registers are implemented.

Dirty, bit [2]

Controls the functionality of GICR_VPENDBASER.Dirty.

DirtyMeaning
0b0

GICR_VPENDBASER.Dirty is UNKNOWN when GICR_VPENDBASER.Valid == 1.

0b1

GICR_VPENDBASER.Dirty indicates when the Virtual Pending Table has been parsed when GICR_VPENDBASER.Valid is written from 0 to 1.

When GICR_TYPER.VLPIS == 0, this field is RES0.

VLPIS, bit [1]

Indicates whether the GIC implementation supports virtual LPIs and the direct injection of virtual LPIs.

VLPISMeaning
0b0

The implementation does not support virtual LPIs or the direct injection of virtual LPIs.

0b1

The implementation supports virtual LPIs and the direct injection of virtual LPIs.

Note

In GICv3 implementations this field is RES0.

PLPIS, bit [0]

Indicates whether the GIC implementation supports physical LPIs.

PLPISMeaning
0b0

The implementation does not support physical LPIs.

0b1

The implementation supports physical LPIs.

Accessing the GICR_TYPER

GICR_TYPER can be accessed through the memory-mapped interfaces:

ComponentFrameOffsetInstance
GIC RedistributorRD_base0x0008GICR_TYPER

This interface is accessible as follows:

  • When GICD_CTLR.DS == 0b0 access to this register is RO.
  • When IsAccessSecure() access to this register is RO.
  • When !IsAccessSecure() access to this register is RO.


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