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CNTPCT, Counter-timer Physical Count

The CNTPCT characteristics are:

Purpose

Holds the 64-bit physical count value.

Configuration

The power domain of CNTPCT is IMPLEMENTATION DEFINED.

For more information see 'Power and reset domains for the system level implementation of the Generic Timer' in Chapter I1 of the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile.

Attributes

CNTPCT is a 64-bit register.

Field descriptions

The CNTPCT bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
Physical count value
Physical count value
313029282726252423222120191817161514131211109876543210

Bits [63:0]

Physical count value.

Accessing the CNTPCT

CNTPCT can be implemented in any implemented CNTBaseN frame, and in the corresponding CNTEL0BaseN frame, as a RO register.

'CNTCTLBase status and control fields for the CNTBaseN and CNTEL0BaseN frames' in Chapter I1 of the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile describes the status fields that identify whether a CNTBaseN frame is implemented, and for an implemented frame:

  • Whether the CNTBaseN frame has virtual timer capability.
  • Whether the corresponding CNTEL0BaseN frame is implemented.
  • For an implementation that recognizes two Security states, whether the CNTBaseN frame, and any corresponding CNTEL0BaseN frame, is accessible by Non-secure accesses.

For an implemented CNTBaseN frame:

  • CNTPCT is accessible in that frame, as a RO register, if the value of CNTACR<n>.RPCT is 1.
  • Otherwise, the CNTPCT address in that frame is RAZ/WI.

For an implemented CNTEL0BaseN frame:

  • CNTPCT is accessible in that frame if both:
    • CNTPCT is accessible in the corresponding CNTBaseN frame.
    • The value of CNTEL0ACR.EL0PCTEN is 1.
  • Otherwise, the CNTPCT address in that frame is RAZ/WI.

If the implementation supports 64-bit atomic accesses, then the CNTPCT register must be accessible as an atomic 64-bit value.

CNTPCT can be accessed through the memory-mapped interfaces:

ComponentFrameOffsetInstanceRange
TimerCNTBaseN0x000CNTPCT31:0

Access on this interface is RO.

ComponentFrameOffsetInstanceRange
TimerCNTBaseN0x004CNTPCT63:32

Access on this interface is RO.

ComponentFrameOffsetInstanceRange
TimerCNTEL0BaseN0x000CNTPCT31:0

Access on this interface is RO.

ComponentFrameOffsetInstanceRange
TimerCNTEL0BaseN0x004CNTPCT63:32

Access on this interface is RO.



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