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CTIINEN<n>, CTI Input Trigger to Output Channel Enable registers, n = 0 - 31

The CTIINEN<n> characteristics are:

Purpose

Enables the signaling of an event on output channels when input trigger event n is received by the CTI.

Configuration

CTIINEN<n> is in the Debug power domain. RW fields in this register reset to architecturally UNKNOWN values. These apply only on an External debug reset. The register is not affected by a Warm reset and is not affected by a Cold reset.

If input trigger n is not connected, the behavior of CTIINEN<n> is IMPLEMENTATION DEFINED.

Attributes

CTIINEN<n> is a 32-bit register.

Field descriptions

The CTIINEN<n> bit assignments are:

313029282726252423222120191817161514131211109876543210
INEN<x>, bit [x]

INEN<x>, bit [x], for x = 0 to 31

Input trigger <n> to output channel <x> enable.

Bits [31:N] are RAZ/WI. N is the number of ECT channels implemented as defined by the CTIDEVID.NUMCHAN field.

Possible values of this bit are:

INEN<x>Meaning
0b0

Input trigger <n> will not generate an event on output channel <x>.

0b1

Input trigger <n> will generate an event on output channel <x>.

On a External debug reset, this field resets to an architecturally UNKNOWN value.

Accessing the CTIINEN<n>

CTIINEN<n> can be accessed through the external debug interface:

ComponentOffsetInstance
CTI0x020 + 4nCTIINEN<n>

This interface is accessible as follows:

  • When SoftwareLockStatus() access to this register is RO.
  • When !SoftwareLockStatus() access to this register is RW.


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