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ERRGSR, Error Group Status Register

The ERRGSR characteristics are:

Purpose

ERRGSR shows the status for the records in the group.

Configuration

This register is present only when RAS is implemented. Otherwise, direct accesses to ERRGSR are UNDEFINED.

This manual describes the memory-mapped view of a group with up to 56 records, the most that can be contained in a 4KB component. Extra records might be added by increasing the page size and extending ERRGSR into multiple registers.

Attributes

ERRGSR is a 64-bit register.

Field descriptions

The ERRGSR bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
RES0S<m>, bit [m]
S<m>, bit [m]
313029282726252423222120191817161514131211109876543210

Bits [63:56]

Reserved, RES0.

S<m>, bit [m], for m = 0 to 55

The status for Error Record <m>. A read-only copy of ERR<m>STATUS.V.

S<m>Meaning
0b0

No error.

0b1

One or more errors.

If the corresponding record is not implemented, or the corresponding record does not support this type of reporting, this bit is RES0.

Accessing the ERRGSR

ERRGSR can be accessed through the memory-mapped interfaces:

ComponentOffsetInstance
RAS0xE00ERRGSR

Access on this interface is RO.



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