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MPAMF_IIDR, MPAM Implemenation Identification Register

The MPAMF_IIDR characteristics are:

Purpose

The MPAMF_IIDR is a 32-bit read-only register that gives identification information to uniquely define the MSC.

Configuration

The power domain of MPAMF_IIDR is IMPLEMENTATION DEFINED.

Attributes

MPAMF_IIDR is a 32-bit register.

Field descriptions

The MPAMF_IIDR bit assignments are:

313029282726252423222120191817161514131211109876543210
ProductIDVariantRevisionImplementer

ProductID, bits [31:20]

IMPLEMENTATION DEFINED.

IMPLEMENTATION DEFINED value identifying the MPAM MSC.

Variant, bits [19:16]

IMPLEMENTATION DEFINED.

IMPLEMENTATION DEFINED value used to distinguish product variants, or major revisions of the product.

Revision, bits [15:12]

IMPLEMENTATION DEFINED.

IMPLEMENTATION DEFINED value used to distinguish minor revisions of the product.

Implementer, bits [11:0]

Contains the JEP106 code of the company that implemented the MPAM MSC.

[11:8] must contain the JEP106 continuation code of the implementer.

[7] must always be 0.

[6:0] must contain the JEP106 identity code of the implementer.

For an Arm implementation, bits[11:0] are 0x43B.

Accessing the MPAMF_IIDR

This register is part of the MPAMF_BASE memory frame. In a system that supports Secure and Non-secure memory maps, the MPAMF_BASE frame must be accessible in both Secure and Non-secure memory address maps.

MPAMF_IIDR must be accessible from the Non-secure and Secure address maps.

MPAMF_IIDR must be shared between the Secure and Non-secure address maps.

MPAMF_IIDR can be accessed through the memory-mapped interfaces:

ComponentFrameOffsetInstance
MPAM.anyMPAMF_BASE_s0x0018MPAMF_IIDR_s

Access on this interface is RO.

ComponentFrameOffsetInstance
MPAM.anyMPAMF_BASE_ns0x0018MPAMF_IIDR_ns

Access on this interface is RO.



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