MPAMF_PARTID_NRW_IDR, MPAM PARTID Narrowing ID register
The MPAMF_PARTID_NRW_IDR characteristics are:
Purpose
The MPAMF_PARTID_NRW_IDR is a 32-bit read-only register that indicates the largest internal PARTID for this MSC.
Configuration
The power domain of MPAMF_PARTID_NRW_IDR is IMPLEMENTATION DEFINED.
This register is present only when MPAMF_IDR.HAS_PARTID_NRW == 1. Otherwise, direct accesses to MPAMF_PARTID_NRW_IDR are IMPLEMENTATION DEFINED.
Attributes
MPAMF_PARTID_NRW_IDR is a 32-bit register.
Field descriptions
The MPAMF_PARTID_NRW_IDR bit assignments are:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | INTPARTID_MAX | ||||||||||||||||||||||||||||||
Bits [31:16]
Reserved, RES0.
INTPARTID_MAX, bits [15:0]
The largest intPARTID supported in this MSC.
Accessing the MPAMF_PARTID_NRW_IDR
This register is part of the MPAMF_BASE memory frame. In a system that supports Secure and Non-secure memory maps, the MPAMF_BASE frame must be accessible in both Secure and Non-secure memory address maps.
MPAMF_PARTID_NRW_IDR must be accessible from the Non-secure and Secure address maps.
MPAMF_PARTID_NRW_IDR is permitted to be shared between the Secure and Non-secure address maps unless the register contents is different for Secure and Non-secure partitions, when the register must be banked.
MPAMF_PARTID_NRW_IDR can be accessed through the memory-mapped interfaces:
| Component | Frame | Offset | Instance |
|---|---|---|---|
| MPAM.any | MPAMF_BASE_s | 0x0050 | MPAMF_PARTID_NRW_IDR_s |
Access on this interface is RO.
| Component | Frame | Offset | Instance |
|---|---|---|---|
| MPAM.any | MPAMF_BASE_ns | 0x0050 | MPAMF_PARTID_NRW_IDR_ns |
Access on this interface is RO.