DBGDSCRint, Debug Status and Control Register, Internal View
The DBGDSCRint characteristics are:
Purpose
Main control register for the debug implementation. This is an internal, read-only view.
Configuration
AArch32 System register DBGDSCRint bits [30:29] are architecturally mapped to AArch64 System register MDCCSR_EL0[30:29] .
AArch32 System register DBGDSCRint bits [15:2] are architecturally mapped to AArch32 System register DBGDSCRext[15:2] .
This register is required in all implementations.
DBGDSCRint.{NS, SPNIDdis, SPIDdis, MDBGen, UDCCdis, MOE} are UNKNOWN when the register is accessed at EL0. However, although these values are not accessible at EL0 by instructions that are neither UNPREDICTABLE nor return UNKNOWN values, it is permissible for an implementation to return the values of DBGDSCRext.{NS, SPNIDdis, SPIDdis, MDBGen, UDCCdis, MOE} for these fields at EL0.
It is also permissible for an implementation to return the same values as defined for a read of DBGDSCRint at EL1 or above. (This is the case even if the implementation does not support AArch32 at EL1 or above.)
Attributes
DBGDSCRint is a 32-bit register.
Field descriptions
The DBGDSCRint bit assignments are:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0 | RXfull | TXfull | RES0 | NS | SPNIDdis | SPIDdis | MDBGen | RES0 | UDCCdis | RES0 | MOE | RES0 | |||||||||||||||||||
Bit [31]
Reserved, RES0.
RXfull, bit [30]
DTRRX full. Read-only view of the equivalent bit in the EDSCR.
TXfull, bit [29]
DTRTX full. Read-only view of the equivalent bit in the EDSCR.
Bits [28:19]
Reserved, RES0.
NS, bit [18]
Non-secure status.
Read-only view of the equivalent bit in the DBGDSCRext. Arm deprecates use of this field.
SPNIDdis, bit [17]
Secure privileged non-invasive debug disable.
Read-only view of the equivalent bit in the DBGDSCRext. Arm deprecates use of this field.
SPIDdis, bit [16]
Secure privileged invasive debug disable.
Read-only view of the equivalent bit in the DBGDSCRext. Arm deprecates use of this field.
MDBGen, bit [15]
Monitor debug events enable.
Read-only view of the equivalent bit in the DBGDSCRext.
Bits [14:13]
Reserved, RES0.
UDCCdis, bit [12]
User mode access to Debug Communications Channel disable.
Read-only view of the equivalent bit in the DBGDSCRext. Arm deprecates use of this field.
Bits [11:6]
Reserved, RES0.
MOE, bits [5:2]
Method of Entry for debug exception. When a debug exception is taken to an Exception level using AArch32, this field is set to indicate the event that caused the exception:
| MOE | Meaning |
|---|---|
| 0b0001 |
Breakpoint |
| 0b0011 |
Software breakpoint (BKPT) instruction |
| 0b0101 |
Vector catch |
| 0b1010 |
Watchpoint |
Read-only view of the equivalent bit in the DBGDSCRext.
Bits [1:0]
Reserved, RES0.
Accessing the DBGDSCRint
Accesses to this register use the following encodings:
MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
| coproc | opc1 | CRn | CRm | opc2 |
|---|---|---|---|---|
| 0b1110 | 0b000 | 0b0000 | 0b0001 | 0b000 |
if PSTATE.EL == EL0 then
if !ELUsingAArch32(EL1) && MDSCR_EL1.TDCC == '1' then
if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then
AArch64.AArch32SystemAccessTrap(EL2, 0x05);
else
AArch64.AArch32SystemAccessTrap(EL1, 0x05);
elsif ELUsingAArch32(EL1) && DBGDSCRext.UDCCdis == '1' then
if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then
AArch64.AArch32SystemAccessTrap(EL2, 0x05);
elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.TGE == '1' then
AArch32.TakeHypTrapException(0x00);
else
UNDEFINED;
elsif EL2Enabled() && !ELUsingAArch32(EL2) && (HCR_EL2.TGE == '1' || MDCR_EL2.<TDE,TDA> != '00') then
AArch64.AArch32SystemAccessTrap(EL2, 0x05);
elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDA == '1' then
AArch64.AArch32SystemAccessTrap(EL3, 0x05);
else
return DBGDSCRint;
elsif PSTATE.EL == EL1 then
if EL2Enabled() && !ELUsingAArch32(EL2) && MDCR_EL2.<TDE,TDA> != '00' then
AArch64.AArch32SystemAccessTrap(EL2, 0x05);
elsif EL2Enabled() && ELUsingAArch32(EL2) && HDCR.<TDE,TDA> != '00' then
AArch32.TakeHypTrapException(0x05);
elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDA == '1' then
AArch64.AArch32SystemAccessTrap(EL3, 0x05);
else
return DBGDSCRint;
elsif PSTATE.EL == EL2 then
if HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDA == '1' then
AArch64.AArch32SystemAccessTrap(EL3, 0x05);
else
return DBGDSCRint;
elsif PSTATE.EL == EL3 then
return DBGDSCRint;