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PMMIR, Performance Monitors Machine Identification Register
The PMMIR characteristics are:
Purpose
Describes Performance Monitors parameters specific to the implementation to software.
Configuration
This register is present only when ARMv8.4-PMU is implemented. Otherwise, direct accesses to PMMIR are UNDEFINED.
Attributes
PMMIR is a 32-bit register.
Field descriptions
The PMMIR bit assignments are:
Bits [31:8]
Reserved, RES0.
SLOTS, bits [7:0]
Operation width. The largest value by which the STALL_SLOT event might increment by in a single cycle. If the STALL_SLOT event is not implemented, this field might read as zero.
Accessing the PMMIR
Accesses to this register use the following encodings:
MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}
| coproc | opc1 | CRn | CRm | opc2 |
|---|---|---|---|---|
| 0b1111 | 0b000 | 0b1001 | 0b1110 | 0b110 |
if PSTATE.EL == EL0 then
UNDEFINED;
elsif PSTATE.EL == EL1 then
if EL2Enabled() && !ELUsingAArch32(EL2) && HSTR_EL2.T9 == '1' then
AArch64.AArch32SystemAccessTrap(EL2, 0x03);
elsif EL2Enabled() && ELUsingAArch32(EL2) && HSTR.T9 == '1' then
AArch32.TakeHypTrapException(0x03);
elsif EL2Enabled() && !ELUsingAArch32(EL2) && MDCR_EL2.TPM == '1' then
AArch64.AArch32SystemAccessTrap(EL2, 0x03);
elsif EL2Enabled() && ELUsingAArch32(EL2) && HDCR.TPM == '1' then
AArch32.TakeHypTrapException(0x03);
elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TPM == '1' then
AArch64.AArch32SystemAccessTrap(EL3, 0x03);
else
return PMMIR;
elsif PSTATE.EL == EL2 then
if HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TPM == '1' then
AArch64.AArch32SystemAccessTrap(EL3, 0x03);
else
return PMMIR;
elsif PSTATE.EL == EL3 then
return PMMIR;