ERRDEVARCH, Device Architecture Register

The ERRDEVARCH characteristics are:

Purpose

Provides discovery information for the component.

Configuration

This register is present only when RAS is implemented. Otherwise, direct accesses to ERRDEVARCH are UNDEFINED.

Attributes

ERRDEVARCH is a 32-bit register.

Field descriptions

The ERRDEVARCH bit assignments are:

ARCHITECT, bits [31:21]

Architect.

Defines the architect of the component. Bits [31:28] are the JEP106 continuation code (JEP106 bank ID, minus 1) and bits [27:21] are the JEP106 ID code.

This field reads as 0x23B.

Other values are defined by the JEDEC JEP106 standard.

PRESENT, bit [20]

DEVARCH Present.

Defines that the DEVARCH register is present.

This bit is RAO.

REVISION, bits [19:16]

Revision.

Defines the architecture revision of the component. The defined values of this field are:

All other values are reserved.

ARCHVER, bits [15:12]

Architecture Version.

Defines the architecture version of the component. The defined values of this field are:

This field reads as 0b0000.

All other values are reserved.

ARCHVER and ARCHPART are also defined as a single field, ARCHID, so that ARCHVER is ARCHID[15:12].

ARCHPART, bits [11:0]

Architecture Part.

Defines the architecture of the component.

This register reads as 0xA00.

ARCHVER and ARCHPART are also defined as a single field, ARCHID, so that ARCHPART is ARCHID[11:0].

Accessing the ERRDEVARCH

ERRDEVARCH can be accessed through the memory-mapped interfaces:

Accesses on this interface are RO.