PMAUTHSTATUS, Performance Monitors Authentication Status register
The PMAUTHSTATUS characteristics are:
Purpose
Provides information about the state of the IMPLEMENTATION DEFINED authentication interface for Performance Monitors.
Configuration
It is IMPLEMENTATION DEFINED whether PMAUTHSTATUS is implemented in the Core power domain or in the Debug power domain.
If ARMv8.3-DoPD is implemented, this register is in the Core power domain. If ARMv8.3-DoPD is not implemented, this register is in the Debug power domain.
This register is OPTIONAL, and is required for CoreSight compliance. Arm recommends that this register is implemented.
Attributes
PMAUTHSTATUS is a 32-bit register.
Field descriptions
The PMAUTHSTATUS bit assignments are:
Bits [31:8]
Reserved, RES0.
SNID, bits [7:6]
Holds the same value as DBGAUTHSTATUS_EL1.SNID.
SID, bits [5:4]
Secure invasive debug. Possible values of this field are:
SID | Meaning |
---|---|
0b00 |
Not implemented. |
All other values are reserved.
NSNID, bits [3:2]
Holds the same value as DBGAUTHSTATUS_EL1.NSNID.
NSID, bits [1:0]
Non-secure invasive debug. Possible values of this field are:
NSID | Meaning |
---|---|
0b00 |
Not implemented. |
All other values are reserved.
Accessing the PMAUTHSTATUS
PMAUTHSTATUS can be accessed through the external debug interface:
Component | Offset | Instance |
---|---|---|
PMU | 0xFB8 | PMAUTHSTATUS |
This interface is accessible as follows:
- When ARMv8.3-DoPD is not implemented or IsCorePowered() accesses to this register are RO.
- Otherwise accesses to this register generate an error response.