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GICD_IIDR, Distributor Implementer Identification Register
The GICD_IIDR characteristics are:
Purpose
Provides information about the implementer and revision of the Distributor.
Configuration
This register is available in all configurations of the GIC. If the GIC implementation supports two Security states, this register is Common.
Attributes
GICD_IIDR is a 32-bit register.
Field descriptions
The GICD_IIDR bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ProductID | RES0 | Variant | Revision | Implementer |
ProductID, bits [31:24]
An IMPLEMENTATION DEFINED product identifier.
Bits [23:20]
Reserved, RES0.
Variant, bits [19:16]
An IMPLEMENTATION DEFINED variant number. Typically, this field is used to distinguish product variants, or major revisions of a product.
Revision, bits [15:12]
An IMPLEMENTATION DEFINED revision number. Typically, this field is used to distinguish minor revisions of a product.
Implementer, bits [11:0]
Contains the JEP106 code of the company that implemented the Distributor:
- Bits [11:8] are the JEP106 continuation code of the implementer. For an Arm implementation, this field is 0x4.
- Bit [7] is always 0.
- Bits [6:0] are the JEP106 identity code of the implementer. For an Arm implementation, bits [7:0] are therefore 0x3B.
Accessing the GICD_IIDR
GICD_IIDR can be accessed through the memory-mapped interfaces:
Component | Offset | Instance |
---|---|---|
GIC Distributor | 0x0008 | GICD_IIDR |
This interface is accessible as follows:
- When GICD_CTLR.DS == 0b0 accesses to this register are RO.
- When IsAccessSecure() accesses to this register are RO.
- When !IsAccessSecure() accesses to this register are RO.